Advanced electronic device structures using semiconductor structures and superlattices
US11563144B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2021 |
| Grant date | Jan 24, 2023 |
| Priority date | — |
| Expiry date | Sep 3, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H29/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.