Nonvolatile memory devices, systems and methods for fast, secure, resilient system boot
US11567844B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2021 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Jun 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/033
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A storage device can include at least one nonvolatile (NV) memory array that includes a first section having a first physical address range, and a second section having a second physical address range. A nonvolatile fault indication can be set to at least a fault state or a no-fault state. A memory watchdog circuit configured to set the fault indication to the fault state in response to an expiration of a predetermined watchdog period, the watchdog period being reset in response to a defer indication. An address mapping circuit can be configured to, in response to the fault indication having the no fault state, mapping input addresses to the first physical addresses range, and in response to the fault indication having the fault state, mapping the same input addresses to the second physical address range. Corresponding methods and systems are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.