Semiconductor packages
US11569137B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 30, 2021 |
| Grant date | Jan 31, 2023 |
| Priority date | — |
| Expiry date | Jul 29, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/214
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a semiconductor chip having first and second contact pads that are alternately arranged in a first direction; an insulating film having first openings respectively defining first pad regions of first contact pads, and second openings respectively defining second pad regions of the second contact pads; first and second conductive capping layers on the first and second pad regions, respectively; and an insulating layer on the insulating film, and having first and second contact holes respectively connected to the first and second conductive capping layers. Each of the first and second pad regions includes a bonding region having a first width and a probing region having a second width, greater than the first width, and each of the second pad regions is arranged in a direction that is opposite to each of the plurality of first pad regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.