Complex I/O value prediction for multiple values with physical or virtual addresses
US11573800B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2018 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Sep 14, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/681
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, and corresponding method, for input/output (I/O) value determination, generates an I/O instruction for an I/O device, the I/O device including a state machine with state transition logic. The apparatus comprises a controller that includes a simplified state machine with a reduced version of the state transition logic of the state machine of the I/O device. The controller is configured to improve instruction execution performance of a processor core by employing the simplified state machine to predict at least one state value of at least one I/O device true state value to be affected by the I/O instruction at the I/O device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.