Memory device with charge-recycling arrangement
US11574658B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2021 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes: a sense amplifier; a branched line selectively connectable to the amplifier; an array of bit lines connected to corresponding memory cells; and an intra-sense-amplifier recycling arrangement configured to do as follows including: recovering a first charge from a first bit line associated with a first one of the memory cells, the first charge being associated with a preceding first evaluation performed by the sense amplifier; and boosting the branched line to a reference voltage including reusing the first charge to at least partially charge the branched line; and wherein the sense amplifier is configured to make a second evaluation of a stored value in a second memory cell relative to the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.