Semiconductor device having high voltage transistors
US11575009B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Sep 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A semiconductor device includes a gate structure disposed on a substrate. The gate structure has a first sidewall and a second sidewall facing the first sidewall. A first impurity region is disposed within an upper portion of the substrate. The first impurity region is spaced apart from the first sidewall. A third impurity region is within the upper portion of the substrate. The third impurity region is spaced apart from the second sidewall. A first trench is disposed within the substrate between the first sidewall and the first impurity region. The first trench is spaced apart from the first sidewall. A first barrier insulation pattern is disposed within the first trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.