Systems and methods for performing horizontal tile operations
US11579883B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2018 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Sep 14, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3893
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed embodiments relate to systems and methods for performing instructions specifying horizontal tile operations. In one example, a processor includes fetch circuitry to fetch an instruction specifying a horizontal tile operation, a location of a M by N source matrix comprising K groups of elements, and locations of K destinations, wherein each of the K groups of elements comprises the same number of elements, decode circuitry to decode the fetched instruction, and execution circuitry to respond to the decoded instruction by generating K results, each result being generated by performing the specified horizontal tile operation across every element of a corresponding group of the K groups, and writing each generated result to a corresponding location of the K specified destination locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.