Patent · US Active

Memory system and method of operating the same

US11586379B2 · kind B2 · utility

0Cited by
1References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 27, 2021
Grant dateFeb 21, 2023
Priority date
Expiry dateAug 27, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C2029/0411
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory system may include a memory device including at least one sequential area in which a data corresponding to consecutive logical addresses of the at least one sequential area is stored, a sequential buffer configured to temporarily store the data to be stored in the at least one sequential area, a meta buffer configured to store a meta data including a write pointer information indicating a logical address in which data is to be stored from among logical addresses corresponding to the at least one sequential area, and an area state information indicating whether the sequential buffer is allocated to the at least one sequential area, and a memory controller configured to perform a write operation of storing the data in the at least one sequential area in response to a first command received from the host using the meta data.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.