Memory device for generating pulse amplitude modulation-based DQ signal and memory system including the same
US11587598B2 · kind B2 · utility
2Cited by
10References
19Claims
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Key dates
| Filing date | Jul 26, 2021 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Jul 26, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a memory cell array and a transmitter, wherein the transmitter includes a pulse amplitude modulation (PAM) encoder configured to generate a PAM-n first input signal (where n is an integer greater than or equal to 4) from data read from the memory cell array; a pre-driver configured to generate a second input signal based on the first input signal and based on a calibration code signal, and output the second input signal using a first power voltage; and a driver configured to output a PAM-n DQ signal using a second power voltage lower than the first power voltage in response to the second input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.