Local reference voltage generator for non-volatile memory
US11587603B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2020 |
| Grant date | Feb 21, 2023 |
| Priority date | — |
| Expiry date | Dec 15, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device including a reference voltage (VREF) generator and method for operating the same to improve memory sensing margin, and extend operational temperature range and life of the device are disclosed. Generally, the device further includes an array of non-volatile memory cells divided into a plurality of blocks, a sensing circuit coupled to the array to receive and compare memory signals therefrom to the VREF to read data from the cells. The Local reference voltage generator is configured to provide one of a number of reference voltages to the sensing circuit based on which of the blocks is being read. The array can be divided based on row and column addresses of cells in the blocks. Where the cells include 1T1C ferroelectric random access memory (F-RAM) cells, and the reference voltages are selected based on a lowest P-term or highest U-term of the cells in the block being read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.