Method for forming gate-all-around nanowire device
US11594608B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2019 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Sep 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A gate-all-around nanowire device and a method for forming the gate-all-around nanowire device. A first fin and a dielectric layer on the first fin are formed on a substrate. The first fin includes the at least one first epitaxial layer and the at least one second epitaxial layer that are alternately stacked. The dielectric layer exposes a channel region of the first fin. A doping concentration at a lateral surface of the channel region and a doping concentration at a central region of the channel region are different from each other in the at least one second epitaxial layer. After the at least one first epitaxial layer is removed from the channel region, the at least one second epitaxial layer in the channel region serves as at least one nanowire. A gate surrounding the at least one nanowire is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.