Method for producing a semiconductor module arrangement
US11596077B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2017 |
| Grant date | Feb 28, 2023 |
| Priority date | — |
| Expiry date | Dec 20, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49208
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of producing a semiconductor module arrangement includes providing a first subassembly having a number N1 of first adjustment openings, a second subassembly having a number N2 of second adjustment openings and a third subassembly having a plurality of adjustment pins which are fixedly connected to one another, the first subassembly, the second subassembly and the third subassembly being independent of one another and not connected to one another. The first subassembly, the second subassembly and the third subassembly are arranged relative to one another in such a way that each of the adjustment pins engages into one of the first adjustment openings and/or into one of the second adjustment openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.