Patent · US Active

Skip-via proximity interconnect

US11600519B2 · kind B2 · utility

0Cited by
102References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 16, 2019
Grant dateMar 7, 2023
Priority date
Expiry dateJan 22, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L23/53209
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of forming vias and skip vias is provided. The method includes forming a blocking layer on an underlying layer, and forming an overlying layer on the blocking layer. The method further includes opening a hole in the overlying layer that overlaps the blocking layer, and etching past the blocking layer into the underlying layer to form a second hole that is smaller than the hole in the overlying layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.