Inventor · Slingerlands, NY, US

Yann Mignot

28Patents
4h-index
29Co-inventors
55Inventor score

Filing activity: Jun 3, 2016 → Feb 14, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US9991156B2 Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Electricity 14 Active
US9691659B1 Via and chamfer control for advanced interconnects Electricity 12 Active
US9607886B1 Self aligned conductive lines with relaxed overlay Electricity 6 Active
US10475905B2 Techniques for vertical FET gate length control Electricity 4 Active
US9786554B1 Self aligned conductive lines Electricity 4 Active
US9773700B1 Aligning conductive vias with trenches Electricity 3 Active
US11610780B2 Alternating hardmasks for tight-pitch line formation Electricity 2 Active
US10090378B1 Efficient metal-insulator-metal capacitor Electricity 2 Active
US10580652B2 Alternating hardmasks for tight-pitch line formation Emerging Cross-Sectional Technologies 1 Active
US10957583B2 Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Electricity 1 Active
US10651266B2 Efficient metal-insulator-metal capacitor Electricity 1 Active
US11031248B2 Alternating hardmasks for tight-pitch line formation Electricity 1 Active
US10546774B2 Self-aligned quadruple patterning (SAQP) for routing layouts including multi-track jogs Electricity 1 Active
US9852946B1 Self aligned conductive lines Electricity 1 Active
US11164772B2 Spacer-defined process for lithography-etch double patterning for interconnects Electricity 0 Active
US10395985B2 Self aligned conductive lines with relaxed overlay Electricity 0 Active
US11600519B2 Skip-via proximity interconnect Electricity 0 Active
US10978576B2 Techniques for vertical FET gate length control Electricity 0 Active
US10083864B2 Self aligned conductive lines with relaxed overlay Electricity 0 Active
US9911647B2 Self aligned conductive lines Electricity 0 Active
US11075161B2 Large via buffer Electricity 0 Active
US10062605B2 Via and chamfer control for advanced interconnects Electricity 0 Active
US10714389B2 Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration Electricity 0 Active
US9972533B2 Aligning conductive vias with trenches Electricity 0 Active
US10256289B2 Efficient metal-insulator-metal capacitor fabrication Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.