Semiconductor device having a through silicon via and methods of manufacturing the same
US11600552B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 10, 2021 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Sep 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided. The semiconductor device includes a first insulating interlayer disposed on a first surface of a substrate; a pad pattern disposed on a lower surface of the first insulating interlayer, the pad pattern including a first copper pattern; and a through silicon via passing through the substrate and the first insulating interlayer, and contacting the first copper pattern of the pad pattern. The through silicon via includes a first portion passing through the substrate and the first insulating interlayer, and a second portion under the first portion and extending to a portion of the first copper pattern in the pad pattern. A boundary of the through silicon via has a bent portion between the first portion and the second portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.