Spectral shaping of spread spectrum clocks/frequencies through post processing
US11601053B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 12, 2019 |
| Grant date | Mar 7, 2023 |
| Priority date | — |
| Expiry date | Dec 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/04
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit. The integrated circuit comprises a timebase generator and a switch mode direct current-to-direct current (DC-to-DC) converter coupled to the timebase generator. The timebase generator comprises a linear feedback shift register (LFSR) having an output and a logic circuit comprising a first logic inverter, a first AND logic gate, and a first multiplexer, wherein the first logic inverter has an input coupled to a most significant bit of the output of the LFSR, wherein the first AND logic gate has a first input coupled to a second most significant bit of the output of the LFSR and a second input coupled to an output of the first logic inverter, wherein a selector input of the first multiplexer is coupled to an output of the first AND logic gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.