Joerg Goller
13Patents
3h-index
5Co-inventors
49Inventor score
Filing activity: Oct 26, 2001 → Dec 12, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6545507B1 | Fast locking CDR (clock and data recovery circuit) with high jitter tolerance and elimination of effects caused by metastability | Electricity | 42 | Expired |
| US7145831B2 | Data synchronization arrangement | Emerging Cross-Sectional Technologies | 9 | Expired |
| US7660364B2 | Method of transmitting serial bit-stream and electronic transmitter for transmitting a serial bit-stream | Electricity | 4 | Active |
| US7350092B2 | Data synchronization arrangement | Electricity | 3 | Expired |
| US9024593B2 | Power supply unit and a method for operating the same | Electricity | 3 | Active |
| USRE46754E1 | Integrated circuit for clock generation for memory devices | General | 2 | Active |
| US7668022B2 | Integrated circuit for clock generation for memory devices | Physics | 2 | Active |
| US10361627B1 | Reduction of low frequency noise in a discrete spread spectrum timebase | Electricity | 2 | Active |
| US7369068B2 | Method of recovering digital data from a clocked serial input signal and clocked data recovery circuit | Electricity | 1 | Expired |
| US10541610B1 | Spectral shaping of spread spectrum clocks/frequencies through post processing | Electricity | 1 | Active |
| US11601053B2 | Spectral shaping of spread spectrum clocks/frequencies through post processing | Electricity | 0 | Active |
| US11881767B2 | Reduction of low frequency noise in a discrete spread spectrum timebase | Electricity | 0 | Active |
| USRE45359E1 | Integrated circuit for clock generation for memory devices | General | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.