Patent · US Active

Clock shaper circuit for transition fault testing

US11604221B1 · kind B1 · utility

3Cited by

5References

20Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Wilson Pradeep · Savanuru, IN
Sriraj Chellappan · Kanchinakote, IN
Shruti Gupta · Bengaluru, IN

Key dates

Filing date	Dec 30, 2021
Grant date	Mar 14, 2023
Priority date	—
Expiry date	Dec 30, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG11C19/28
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

An integrated circuit for transition fault testing comprises a synchronizing circuit including a first set of shift registers coupled to receive a scan enable signal and to provide a synchronizing signal based on the scan enable signal; a clock leaker circuit coupled to the synchronizing circuit and including a second set of shift registers coupled to receive a first clock signal based on the synchronizing signal and to provide a second clock signal that includes a set of pulses; and a multiplexer (MUX) that includes a first input coupled to receive a shift clock, a second input coupled to the clock leaker circuit to receive the second clock signal, and an output configured to provide an output clock signal that includes a second set of pulses.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.