Reconstituted wafer including integrated circuit die mechanically interlocked with mold material
US11605570B2 · kind B2 · utility
0Cited by
13References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2020 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Sep 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/117
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method. The system may include an integrated circuit (IC) die. The IC die may have two faces and sides. The system may further include mold material. The mold material may surround at least the sides of the IC die. The IC die may be mechanically interlocked with the mold material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.