Semiconductor device having an air gap between gate electrode and source/drain pattern
US11605711B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2021 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | May 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device includes an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern connected to the source/drain pattern, the channel pattern including semiconductor patterns stacked and spaced apart from each other, a gate electrode extending across the channel pattern, and inner spacers between the gate electrode and the source/drain pattern. The semiconductor patterns include stacked first and second semiconductor patterns. The gate electrode includes first and second portions, which are sequentially stacked between the substrate and the first and second semiconductor patterns, respectively. The inner spacers include first and second air gaps, between the first and second portions of the gate electrode and the source/drain pattern. The largest width of the first air gap is larger than that of the second air gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.