Implementing mapping data structures to minimize sequentially written data accesses
US11615020B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 28, 2021 |
| Grant date | Mar 28, 2023 |
| Priority date | — |
| Expiry date | Sep 28, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a memory device, and a processing device, operatively coupled to the memory device, to perform operations including receiving a request to sequentially write data to a block of a memory device, in response to receiving the request, writing the data to the block to obtain sequentially written data, initiating accumulation of logical-to-physical (L2P) mapping data corresponding to the sequentially written data, determining that a criterion for terminating the accumulation of the L2P mapping data is satisfied, in response to determining that the criterion is satisfied, terminating the accumulation of the L2P mapping data to obtain accumulated L2P mapping data, and updating an L2P mapping data structure based on the accumulated L2P mapping data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.