Interposer and electronic package
US11621237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 14, 2019 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Aug 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments include interposers for use in high speed applications. In an embodiment, the interposer comprises an interposer substrate, and an array of pads on a first surface of the interposer substrate. In an embodiment, a plurality of vias pass through the interposer substrate, where each via is electrically coupled to one of the pads in the array of pads. In an embodiment a plurality of heating elements are embedded in the interposer substrate. In an embodiment a first cable is over the first surface interposer substrate. In an embodiment, the first cable comprises an array of conductive lines along the first cable, where conductive lines proximate to a first end of the cable are electrically coupled to pads in the array of pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.