Non-linear inter-ADC calibration by time equidistant triggering

US11621717B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Mihail Jefremow · Augsburg, DE
• Ralph Mueller-Eschenbach · Munich, DE
• Juergen Schaefer · Oberhaching, DE
• Arndt Voigtlaender · Ottobrunn, DE
• David Zipperstein · Munich, DE

Key dates

• Filing date: Nov 5, 2021
• Grant date: Apr 4, 2023
• Expiry date: Nov 5, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03M3/458
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A calibration circuit, including: a first analog-to-digital converter (ADC) configured to sample a nonlinear reference signal continuously at an equidistant sampling rate to generate a reference sampled signal; a trigger timer configured to generate trigger signals; a second ADC configured to sample a point of each of the nonlinear reference signal and repeated versions of the nonlinear reference signal in response to the respective trigger signals at equidistantly increasing delays, to generate a device-under-test (DUT) sampled voltage; and processing circuitry configured to estimate a differential nonlinearity (DNL) of the DUT sampled signal, estimate a DNL of the reference sampled signal, and compare the estimated DNL of the DUT sampled signal with the estimated DNL of the reference sampled signal, to generate a DNL performance indication signal of the second ADC.