Compute-in-memory systems and methods
US11625245B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 28, 2018 |
| Grant date | Apr 11, 2023 |
| Priority date | — |
| Expiry date | Apr 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05B2219/21109
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device may include programmable logic circuitry on a first integrated circuit die and memory that includes compute-in-memory circuitry on a second die. The programmable logic circuitry may be programmed with a circuit design that operates on a first set of data. The compute-in-memory circuitry of the memory may perform an arithmetic operation using the first set of data from the programmable logic circuitry and a second set of data stored in the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.