Voltage supply circuit, memory cell arrangement, and method for operating a memory cell arrangement
US11626164B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 13, 2022 |
| Grant date | Apr 11, 2023 |
| Priority date | — |
| Expiry date | May 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In various aspects, a method for operating a memory cell arrangement is provided, including: providing a set of supply voltages to one or more sets of memory cell drivers to write one or more memory cells of the memory cell arrangement; wherein providing the set of supply voltages includes: ramping a first supply voltage of the set of supply voltages to a first predefined output voltage level, and ramping a second supply voltage of the set of supply voltages to a second predefined output voltage level dependent upon the first supply voltage, the first predefined output voltage level and the second predefined output voltage level defining a first predefined ratio, wherein, during the ramping of the first supply voltage and of the second supply voltage, a first ratio of the first supply voltage to the second supply voltage is substantially equal to or less than the first predefined ratio.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.