Method of forming semiconductor device using range compensating material
US11626392B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2021 |
| Grant date | Apr 11, 2023 |
| Priority date | — |
| Expiry date | Feb 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device includes providing a semiconductor substrate with a circuit layer, forming a range compensating layer over the semiconductor substrate, the range compensating layer having a plurality of different thicknesses, each of the plurality of different thicknesses being inversely proportional to a stopping power of structures disposed under the respective thickness of the range compensating layer, implanting ions into the semiconductor substrate, the ions traveling through the range compensating layer and the circuit layer to define a cleave plane in the semiconductor substrate, removing the range compensating layer, and cleaving the semiconductor substrate at the cleave plane. The range compensating layer can be used to compensate for variations in ion penetration depth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.