Etching mask, method for fabricating the same, and method for fabricating a semiconductor structure using the same
US11631585B2 · kind B2 · utility
0Cited by
0References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2021 |
| Grant date | Apr 18, 2023 |
| Priority date | — |
| Expiry date | Aug 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76883
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor structure includes: providing a substrate and a dielectric layer on the substrate; and forming an etching mask on the dielectric layer; and etching the dielectric layer using the etching mask to form at least one opening therein. The etching mask includes: a hard mask layer, a photoresist layer, and a hexamethyldisilazane (HMDS) layer. The photoresist layer is located over the hard mask layer, and the HMDS layer is located between the hard mask layer and the photoresist layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.