Patent assignee · TW · COMPANY

NANYA TECHNOLOGY CORPORATION

2,252Patents
1,883Active
2,252Granted
72Portfolio score

Filing activity: Aug 30, 1996 → Jul 3, 2024 · 263 expiring within 5 years

Most-cited patents

PatentTitleAreaCited byStatus
US7504184B2 Phase-shifting mask for equal line/space dense line patterns Physics 105 Active
US8299562B2 Isolation structure and device structure including the same Electricity 96 Active
US9799391B1 Dram circuit, redundant refresh circuit and refresh method Physics 78 Active
US8421193B2 Integrated circuit device having through via and method for preparing the same Electricity 62 Active
US6437512B1 Plasma generator Electricity 53 Expired
US6734066B2 Method for fabricating split gate flash memory cell Electricity 52 Expired
US6808979B1 Method for forming vertical transistor and trench capacitor Electricity 50 Expired
US6025263A Underlayer process for high O.sub.3 /TEOS interlayer dielectric deposition Emerging Cross-Sectional Technologies 40 Expired
US6011311A Multilevel interconnect structure for integrated circuits Electricity 39 Expired
US6448150B1 Method for forming shallow trench isolation in the integrated circuit Electricity 37 Expired
US6365506B1 Dual-damascene process with porous low-K dielectric material Electricity 31 Expired
US7948028B2 DRAM device having a gate dielectric layer with multiple thicknesses Electricity 30 Active
US8053370B2 Semiconductor device and fabrications thereof Electricity 28 Active
US5989952A Method for fabricating a crown-type capacitor of a DRAM cell Electricity 27 Expired
US6916715B2 Method for fabricating a vertical NROM cell Electricity 25 Expired
US8003457B2 Fabricating method of vertical transistor Electricity 25 Active
US8343829B2 Recessed-gate transistor device having a dielectric layer with multi thicknesses and method of making the same Electricity 23 Active
US7679163B2 Phase-change memory element Electricity 22 Active
US7994559B2 Recessed-gate transistor device having a dielectric layer with multi thicknesses and method of making the same Electricity 22 Active
US6713341B2 Method of forming a bottle-shaped trench in a semiconductor substrate Electricity 22 Expired
US6750116B1 Method for fabricating asymmetric inner structure in contacts or trenches Electricity 22 Expired
US6225187A Method for STI-top rounding control Electricity 21 Expired
US6083807A Overlay measuring mark and its method Electricity 21 Expired
US8760219B2 Current providing circuit and voltage providing circuit Physics 21 Active
US6001709A Modified LOCOS isolation process for semiconductor devices Electricity 21 Expired

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.