Patent · US Active

Execute in place architecture with integrity check

US11640332B1 · kind B1 · utility

0Cited by

4References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Sunanda Manjunath · Munich, DE
Jens Rosenbusch · Munich, DE

Key dates

Filing date	Oct 15, 2021
Grant date	May 2, 2023
Priority date	—
Expiry date	Oct 15, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG06F11/167
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Systems, methods, and circuitries are provided for checking integrity of code received from an external memory. In one example, a system includes a non-volatile memory and a controller. The non-volatile memory includes a first partition configured to store first data corresponding to program code and a second partition configured to store second data corresponding to a copy of the first data. The controller that includes a processor and comparator circuitry. The comparator circuitry is configured to receive a portion of the first data and a corresponding portion of the second data, compare the portion of the first data to the portion of the second data, when the portion of the first data matches the portion of the second data, provide the portion of the first data to the processor, and when the portion of the first data does not match the portion of the second data, generate an alarm signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.