Process for fabricating an integrated circuit comprising a phase of forming trenches in a substrate and corresponding integrated circuit
US11640921B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2020 |
| Grant date | May 2, 2023 |
| Priority date | — |
| Expiry date | Mar 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76232
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Trenches of different depths in an integrated circuit are formed by a process utilizes a dry etch. A first stop layer is formed over first and second zones of the substrate. A second stop layer is formed over the first stop layer in only the second zone. A patterned mask defines the locations where the trenches are to be formed. The dry etch uses the mask to etch in the first zone, in a given time, through the first stop layer and then into the substrate down to a first depth to form a first trench. This etch also, at the same time, etch in the second zone through the second stop layer, and further through the first stop layer, and then into the substrate down to a second depth to form a second trench. The second depth is shallower than the first depth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.