Semiconductor non-volatile memory devices
US11641739B2 · kind B2 · utility
0Cited by
5References
12Claims
0Family size
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Key dates
| Filing date | Jun 1, 2020 |
| Grant date | May 2, 2023 |
| Priority date | — |
| Expiry date | Jun 1, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6893
Abstract
A memory device is provided. The memory device includes an active region in a substrate, an electrically-isolated electrode, and a dielectric layer. The electrically-isolated electrode is disposed over the active region. The dielectric layer is disposed between the electrically-isolated electrode and the active region and has a first dielectric portion having a first thickness and a second dielectric portion having a second thickness.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.