Method for FinFET fabrication and structure thereof
US11646234B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 29, 2021 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Jul 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate, a semiconductor fin protruding from the semiconductor substrate, and an isolation layer disposed above the semiconductor substrate. The isolation layer includes a first portion disposed on a first sidewall of the semiconductor fin and a second portion disposed on a second sidewall of the semiconductor fin. Top surfaces of the first and second portions of the isolation layer are leveled. The first portion of the isolation layer includes an air pocket. The semiconductor device also includes a dielectric fin with a bottom portion embedded in the second portion of the isolation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.