Inventor · Hsinchu, TW

Fang-Wei Lee

30Patents
2h-index
41Co-inventors
49Inventor score

Filing activity: Jul 24, 2018 → Apr 30, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US11462471B2 Middle-of-line interconnect structure and manufacturing method Electricity 3 Active
US11227794B2 Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure Electricity 2 Active
US11646234B2 Method for FinFET fabrication and structure thereof Electricity 1 Active
US11031291B2 Semiconductor structure and method of forming the same Electricity 1 Active
US11222794B2 Semiconductor fabrication system embedded with effective baking module Electricity 0 Active
US12402394B2 Semiconductor structure Electricity 0 Active
US12336252B2 Inner spacer formation in multi-gate transistors Electricity 0 Active
US11107904B2 Inner spacer formation in multi-gate transistors Electricity 0 Active
US11605728B2 Semiconductor device structure with inner spacer layer Electricity 0 Active
US12021125B2 High selectivity etching with germanium-containing gases Electricity 0 Active
US12033863B2 Semiconductor fabrication system embedded with effective baking module Electricity 0 Active
US12376337B2 Air inner spacers Electricity 0 Active
US12334435B2 Middle-of-line interconnect structure and manufacturing method Electricity 0 Active
US12009294B2 Middle-of-line interconnect structure and manufacturing method Electricity 0 Active
US11973129B2 Semiconductor device structure with inner spacer layer and method for forming the same Electricity 0 Active
US12218219B2 Spacer structure for semiconductor device Electricity 0 Active
US12389619B2 Semiconductor device structure with inner spacer layer Electricity 0 Active
US11201243B2 Nanowire stack GAA device and methods for producing the same Emerging Cross-Sectional Technologies 0 Active
US11373878B2 Technique for semiconductor manufacturing Electricity 0 Active
US12224210B2 Method for FinFet fabrication and structure thereof Electricity 0 Active
US11830928B2 Inner spacer formation in multi-gate transistors Electricity 0 Active
US11855192B2 Semiconductor device and manufacturing method thereof Electricity 0 Active
US11056393B2 Method for FinFET fabrication and structure thereof Electricity 0 Active
US12266538B2 Method for manufacturing semiconductor device using etchant composition having high etching selectivity Electricity 0 Active
US11972974B2 Self-aligned barrier for metal vias Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.