Semiconductor device having a lead flank and method of manufacturing a semiconductor device having a lead flank
US11646248B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2022 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Mar 22, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device comprises a substrate having a substrate top side, a substrate lateral side, and a substrate bottom side, an electronic device on the substrate top side, and an encapsulant on the substrate top side and contacting a lateral surface of the electronic device. The substrate comprises a conductive structure and a dielectric structure that extends comprising a protrusion in contact with the encapsulant. The conductive structure comprises a lead comprising a lead flank, the lead flank comprising a cavity and a conductive coating on a surface of the lead in the cavity. The conductive structure comprises a pad exposed at the substrate top side, embedded in the dielectric structure, and adjacent to the protrusion, to electrically couple with the electronic device via a first internal interconnect. Other examples and related methods are also disclosed herein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.