Method and apparatus to improve connection pitch in die-to-wafer bonding
US11646284B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2021 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Nov 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices, packaging architectures and associated methods are disclosed. In one embodiment, a semiconductor device is disclosed. The semiconductor device includes a first semiconductor die having a first bonding surface that is formed with a first set of contacts patterned with a first connection pitch. A second semiconductor die has a second bonding surface that is formed with a second set of contacts patterned with a second connection pitch. The second set of contacts are further patterned with a paired offset. The second semiconductor die is bonded to the first semiconductor die such that the first set of contacts is disposed in opposed electrical engagement with at least a portion of the second set of contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.