Memory device having a channel provided on a memory unit
US11647625B2 · kind B2 · utility
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4References
20Claims
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Key dates
| Filing date | Mar 3, 2021 |
| Grant date | May 9, 2023 |
| Priority date | — |
| Expiry date | Aug 4, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device is provided. The memory device includes: a substrate; a memory unit provided on the substrate; a channel provided on the memory unit; a word line surrounded by the channel and extending in a first horizontal direction; a gate insulating layer interposed between the channel and the word line; and a bit line contacting an upper end of the channel and extending in a second horizontal direction that crosses the first horizontal direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.