Interposer design in package structures for wire bonding applications
US11652087B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 11, 2021 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Jun 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming microelectronic package structures, and structures formed thereby, are described. Those methods/structures may include attaching a first die on a board, attaching an interposer on a top surface of the first die, and attaching a second die on the top surface of the first die that is adjacent the interposer, wherein the second die is offset from a center region of the first die. A first wire conductive structure may be attached to the second die that extends from the second die to a top surface of the interposer. A second wire conductive structure is attached to the interposer and extends from the interposer to the board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.