Transistor level input and output harmonic terminations
US11652461B2 · kind B2 · utility
5Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2020 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Nov 25, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transistor device includes a transistor cell comprising a channel region, a gate runner that is electrically connected to a gate electrode on the channel region and physically separated from the gate electrode, and a harmonic termination circuit electrically connected to the gate runner between the gate electrode and an input terminal of the transistor device, the harmonic termination circuit configured to terminate signals at a harmonic frequency of a fundamental operating frequency of the transistor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.