Managing open blocks in memory systems
US11656934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2022 |
| Grant date | May 23, 2023 |
| Priority date | — |
| Expiry date | Apr 27, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and apparatus including computer-readable mediums for managing open blocks in memory systems such as NAND flash memory devices are provided. In one aspect, a method includes: evaluating a read disturbance level of an open block in a memory, the open block having one or more programmed word lines and one or more blank word lines, and in response to determining that the read disturbance level of the open block is beyond a threshold level, managing each memory cell in at least one of the blank word lines to have a smaller data storing capacity than each memory cell in at least one of the one or more programmed word lines so as to reduce impact of read disturbance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.