Patent · US Active

Monotonic counters in memories

US11657877B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

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Inventors

Key dates

Filing dateJul 2, 2021
Grant dateMay 23, 2023
Priority date
Expiry dateAug 3, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C11/5628
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus, such as a memory (e.g., a NAND memory), can have a controller, a volatile counter coupled to the controller, and a non-volatile memory array coupled to the controller. The controller can be configured to write information, other than a count of the counter, in the array each time the count of the counter has been incremented by a particular number of increments. Counts can be monotonic, non-volatile, and power-loss tolerant.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.