Semiconductor package including an interposer and method of fabricating the same
US11658107B2 · kind B2 · utility
0Cited by
9References
15Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 21, 2022 |
| Grant date | May 23, 2023 |
| Priority date | — |
| Expiry date | Jun 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a lower package, an interposer on the lower package, and an under-fill layer between the interposer and the lower package. The interposer includes a through hole that vertically penetrates the interposer. The under-fill layer includes an extension that fills at least a portion of the through hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.