High-speed functional protocol based test and debug

US11662383B2 · kind B2 · utility

Assignee

• SYNOPSYS, INC. · US

Inventors

• Anubhav Sinha · Hyderabad, IN
• Brian Archer · Mountain View, US
• Abhijeet Samudra · Santa Clara, US
• Kranthi Kandula · Hyderabad, IN
• Amit Kapatkar · Hyderabad, IN
• Akshay Gupta · San Jose, US
• Hemasagar Babu Reddy · Sunnyvale, US
• Ajay Nagarandal · Sunnyvale, US

Key dates

• Filing date: Oct 14, 2021
• Grant date: May 30, 2023
• Expiry date: Oct 14, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F30/392
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

An integrated circuit (IC) device and a method for communicating test data utilizes test control circuitry, and a test controller. The test controller is coupled with the test control circuitry and decodes packetized test pattern data to identify configuration data for the test controller and test data for the test control circuitry. The test controller further communicates the test data to the test control circuitry, and packetizes resulting data received from the test control circuitry. The resulting data corresponds to errors identified by a test performed based on the test pattern data.