Backside interconnect structures for semiconductor devices and methods of forming the same
US11664374B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2020 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Nov 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Backside interconnect structures having reduced critical dimensions for semiconductor devices and methods of forming the same are disclosed. In an embodiment, a device includes a first transistor structure over a front-side of a substrate; a first backside interconnect structure over a backside of the substrate, the first backside interconnect structure including first conductive features having tapered sidewalls with widths that narrow in a direction away from the substrate; a power rail extending through the substrate, the power rail being electrically coupled to the first conductive features; and a first source/drain contact extending from the power rail to a first source/drain region of the first transistor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.