Hou-Yu Chen
102Patents
9h-index
70Co-inventors
83Inventor score
Filing activity: Dec 10, 2001 → Jan 2, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6518105B1 | High performance PD SOI tunneling-biased MOSFET | Emerging Cross-Sectional Technologies | 130 | Expired |
| US9171925B2 | Multi-gate devices with replaced-channels and methods for forming the same | Electricity | 37 | Active |
| US9607838B1 | Enhanced channel strain to reduce contact resistance in NMOS FET devices | Electricity | 20 | Active |
| US7244640B2 | Method for fabricating a body contact in a Finfet structure and a device including the same | Electricity | 19 | Expired |
| US8659032B2 | FinFET and method of fabricating the same | Electricity | 19 | Active |
| US9000536B2 | Fin field effect transistor having a highly doped region | Electricity | 15 | Active |
| US7943986B2 | Method for fabricating a body contact in a finfet structure and a device including the same | Electricity | 11 | Active |
| US9425313B1 | Semiconductor device and manufacturing method thereof | Electricity | 10 | Active |
| US9252271B2 | Semiconductor device and method of making | Electricity | 9 | Active |
| US11239208B2 | Packaged semiconductor devices including backside power rails and methods of forming the same | Electricity | 7 | Active |
| US9941368B2 | Raised epitaxial LDD in MuGFETs and methods for forming the same | Electricity | 6 | Active |
| US7187000B2 | High performance tunneling-biased MOSFET and a process for its manufacture | Electricity | 5 | Expired |
| US10056383B2 | Enhanced channel strain to reduce contact resistance in NMOS FET devices | Electricity | 5 | Active |
| US9166053B2 | FinFET device including a stepped profile structure | Electricity | 4 | Active |
| US9515167B2 | Raised epitaxial LDD in MuGFETs and methods for forming the same | Electricity | 4 | Active |
| US10515966B2 | Enhanced channel strain to reduce contact resistance in NMOS FET devices | Electricity | 4 | Active |
| US9166044B2 | Raised epitaxial LDD in MuGFETs | Electricity | 4 | Active |
| US11502168B2 | Tuning threshold voltage in nanosheet transitor devices | Performing Operations; Transporting | 4 | Active |
| US11710667B2 | Gate-all-around device with trimmed channel and dipoled dielectric layer and methods of forming the same | Electricity | 3 | Active |
| US11664374B2 | Backside interconnect structures for semiconductor devices and methods of forming the same | Electricity | 3 | Active |
| US9634104B2 | FinFET and method of fabricating the same | Electricity | 3 | Active |
| US9053934B2 | Finfet and method of fabricating the same | Electricity | 3 | Active |
| US10014223B2 | Multi-gate devices with replaced-channels and methods for forming the same | Electricity | 3 | Active |
| US11532627B2 | Source/drain contact structure | Electricity | 3 | Active |
| US9653581B2 | Semiconductor device and method of making | Electricity | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.