Semiconductor device with capping conductive layer on an electrode and method of fabricating the same
US11665884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 10, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Feb 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
Abstract
A semiconductor device includes conductive pillars on a semiconductor substrate, a first support pattern that contacts first portions of lateral surfaces of the conductive pillars and connects the conductive pillars to each other, the first support pattern including first support holes that expose second portions of the lateral surfaces of the conductive pillars, a capping conductive pattern that contacts the second portions of the lateral surfaces of the conductive pillars and exposes the first support pattern, the second portions of the lateral surfaces of the conductive pillars being in no contact with the first support pattern, and a dielectric layer that covers the first support pattern and the capping conductive pattern, the dielectric layer being spaced apart from the conductive pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.