Resistive random access memory structure and fabricating method of the same
US11665913B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Dec 2, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistive random access memory (RRAM) structure includes a substrate. A transistor is disposed on the substrate. The transistor includes a gate structure, a source and a drain. A drain contact plug contacts the drain. A metal interlayer dielectric layer is disposed on the drain contact plug. An RRAM is disposed on the drain and within a first trench in the metal interlayer dielectric layer. The RRAM includes the drain contact plug, a metal oxide layer and a top electrode. The drain contact plug serves as a bottom electrode of the RRAM. The metal oxide layer contacts the drain contact plug. The top electrode contacts the metal oxide layer and a metal layer is disposed within the first trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.