Metal etching stop layer in magnetic tunnel junction memory cells
US11665971B2 · kind B2 · utility
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5References
20Claims
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Key dates
| Filing date | Aug 23, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Aug 23, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
Abstract
A method of forming integrated circuits includes forming Magnetic Tunnel Junction (MTJ) stack layers, depositing a conductive etch stop layer over the MTJ stack layers, depositing a conductive hard mask over the conductive etch stop layer, and patterning the conductive hard mask to form etching masks. The patterning is stopped by the conductive etch stop layer. The method further includes etching the conducive etch stop layer using the etching masks to define patterns, and etching the MTJ stack layers to form MTJ stacks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.