Semiconductor device with dielectric spacer liner on source/drain contact
US11670690B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | Jul 11, 2020 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Apr 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a semiconductor substrate, a gate structure, a first source/drain region, a second source/drain region, first source/drain contact and a first dielectric spacer liner. The gate structure is over the semiconductor substrate. The first source/drain region and the second source/drain region are in the semiconductor substrate and respectively on opposite sides of the gate structure. The first source/drain contact is over the first source/drain region. The first dielectric spacer liner lines a sidewall of the first source/drain contact and extends into the first source/drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.