LDMOS and fabricating method of the same
US11670713B2 · kind B2 · utility
0Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2022 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Aug 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An LDMOS includes a semiconductor substrate. A well is disposed within the semiconductor substrate. A body region is disposed within the well. A first gate electrode is disposed on the semiconductor substrate. A source electrode is disposed at one side of the first gate electrode. The source electrode includes a source contact area and numerous vias. The vias connect to the source contact area. The vias extend into the semiconductor substrate. A first drain electrode is disposed at another side of the first gate electrode and is opposed to the source electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.