Terahertz plasmonics for testing very large-scale integrated circuits under bias
US11675002B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2020 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Dec 15, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318533
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Various embodiments are described that relate to failure determination for an integrated circuit. An integrated circuit can be tested to determine if the integrated circuit is functioning properly. The integrated circuit can be subjected to a specific radiation such that the integrated circuit produces a response. This response can be compared against an expected response to determine if the response matches the expected response. If the response does not match the expected response, then the integrated circuit fails the test. If the response matches the expected response, then the integrated circuit passes the test.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.